上海申才择业信息中心<br>2595营运经理<br>
1.Basic Skills;a personnel who<br>-Should be available to communicate in English because most of the subcontractors are locatd in Taiwan,Korea,and Japan.More importantly,the only available language between Korea members and China members might be English.<br>-Majored in science and engineering related department like Electronics,Materials Engineering,and Mechanical Engineering at university.<br>-Should be familiar with Microsoft Office Programs like Excel,Word,and Powe Point for design documentation.<br>2.Attitude and Personality;a personnal who<br>-Has a Spirit of sacrifice and service for the company as well as workfellows should be required expecially in an operation job area.<br>-Should prefer to facilitate others rather than show his(her)own visibility.<br>-Should have a strong responsibility on his(her) task and a mind-set of elaborate time management.<br>-is capable to enjoy meeting various people and frequent business trip to everywhere.<br>3.Design Knowledge and Experience<br>1)Regional R&D manager;a personnel who<br>-Has at least 10years a design experience and mass production experience in IC design related company.<br>-Has the following design skill and a work experience <br> Analog circuit design and simple digital logic design.<br> Custom layout skill<br> Overall knowledge of IC back-end process (ICevaluation&Testing, Package...)<br>-Has a work experience or knowledge of TFT LCD system.<br>2)Analog Circuit Designer;a personnal who<br>-Has a work experience in Analog Circuit Design at Semiconductor IC Design Company.And should have one more the following professional skills.<br>i)Low power OP amplifier design <br>ii)DAC or ADC design<br>iii)RF amplifier design.<br>iv)Full custom layout.<br>v)Simple digital logic design<br>vi)Semiconductor device physics<br>vii)TFT LCD panel system<br>-Has EDA tool skills such as<br>Schematic Capture(Cadence,Design Compiler)<br>Ciruit Simulator(Mentor Graphics,HSPICE)<br>Layout editor(Cadence,Virtuoso)<br>Design Verification(Cadence,Dracula or Menter Graphics,Calibre)<br>3)Digital Logic Designer(Timing Controller);a personnal who<br>-Has a work experience in VLSI or ScoC(System on a Chip) design at Semicoductor IC Design company.<br> VHDL or HDL coding and simulation<br> Loqic Synthesis and loqic simulation <br> Design for testability<br> Automatic place and route <br> Verification and Evaluation <br> LVDS protocol and TFT LCD panel system<br>-Has EDA tool skills for the above professional item</p>
不限15000-19999上海市普陀区中山北路2918号2401室
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